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unisonic technologies co., ltd ub2012 preliminary linear integrated circuit www.unisonic.com.tw 1 of 17 copyright ? 2012 unisonic technologies co., ltd qw-r121-018.c advanced linear charge management ic for single and two-cell lithium-ion and lithium-polymer ? description utc ub2012 is designed for portable electronics with lower cost. its advantages of high-accuracy voltage/current regulation, charging status indication, temperature monitoring, and automatic charge-rate compensation. in applications, the battery temperat ure is continuously under monitor by using an external thermistor, if the temperature is over user-defined threshold; utc ub2012 inhibits charge for safety concern. generally, the utc ub2012 charges the battery in conditioning, cons tant voltage and cons tant current phases. if the battery voltage is lower than the low-voltage threshold (v min ), a low current is used for conditioning the battery. the conditioning charge rate is around 10% of the regulation curr ent and the heat dissipation in the external pass element during the initial stage of the charge is minimized by the conditioning current. after the conditioning phase, the utc ub2012 applies a constant current that be set by an external sense-resistor to the battery. the sense-resistor can be on the battery without additional co mponents. the constant curre nt phase continues until the battery reaches the charge-regulation voltage, then the constant voltage phase is beginning. utc ub2012 offers 4.1v, 4.2v, 8.4v and 8.4v fixed-voltage for single and dual cells. charge stops when the current tapers to the charge termination threshold (i term ) and will recharge if the battery voltage falls below the v rch . the automatic charge-rate compensati on feature reduces the charging time of batteries. for the internal impedance of battery pack during charge, this advanced technique offers safe and dynamic compensation. ? features * ideal for single 4.1v,4.2v and dual-cell 8.2v,8.4v li-ion or li-pol packs * 0.3v dropout voltage for minimizing heat dissipation * better than 1% accuracy of voltage regulation with preset voltages * dynamic compensation of battery pack?s internal impedance to short charging time * optional cell-temperature monitoring * integrated voltage and current regulation with programmable charge-current * integrated cell conditioning for reviving deeply dischar ged cells and minimizing heat dissipation during initial charge stage * charge status output for single or dual led or host processor interface * automatic battery-recharge feature * charge termination by minimum current * automatic low-power sleep mode when v cc is removed * evms available for quick evaluation
ub2012 preliminary linear integrated circuit unisonic technologies co., ltd 2 of 17 www.unisonic.com.tw qw-r121-018 .c ? ordering information ordering number package packing lead free halogen free ub2012xl-s08-r ub2012xg-s08-r sop-8 tape reel ub2012xl-s08-t UB2012XG-S08-T sop-8 tube note: x: output voltage, re fer to marking information. (1) r: tape reel, t: tube (2) s08: sop-8 (3) g: halogen free, l: lead free (4) x: refer to marking information ub2012xl -s08 -r (1) packing type (2) package type (3) lead free (4) output voltage code ? marking information package voltage code marking sop-8 a: 4.1v b: 4.2v c: 8.2v d: 8.4v utc ub2012x g date code voltage code lot code g: halogen free l: lead free ? pin configuration 1 comp ts sns bat v cc cc v ss stat 2 3 4 5 6 7 8 ? pin description pin no. pin name i/o pin description 1 sns i current sense input 2 bat i voltage sense input 3 v cc i supply voltage 4 ts i temperature sense input 5 stat o charge status output 6 v ss ground 7 cc o charge control output 8 comp i charge-rate compensation input (auto comp)
ub2012 preliminary linear integrated circuit unisonic technologies co., ltd 3 of 17 www.unisonic.com.tw qw-r121-018 .c ? block diagram v cc v(bat) v(bat) v(bat) v(bat) vo(reg) v(ts) v(ts) vcc comp ts v(ts) sns v(sns) v(sns) v(sns) vcc-v(sns) vss-v(sns) control logic vcc current regulation voltage termination vcc/2 ts2 ts1 high/low sns set battery conditioning battery recharge voltage regulation sleep mode g(comp) reference vo(reg) v ss stat cc driver driver driver
ub2012 preliminary linear integrated circuit unisonic technologies co., ltd 4 of 17 www.unisonic.com.tw qw-r121-018 .c ? absolute maximum rating (unless otherwise specified.) parameter symbol ratings unit supply voltage (v cc with respect to gnd) ub2012a v cc -0.3 ~ +8.0 v ub2012b ub2012c v cc -0.3 ~ +15 v ub2012d input voltage, sns, bat,ts, comp (all with respect to gnd) v in -0.3 ~ v cc +0.3 v sink current (note 2) stat pin i sink 20 ma source current (note 2) stat pin i source 10 ma output current (note 2) cc pin i out 40 ma power dissipation (t a =25c) p d 300 mw operating temperature t opr -20 ~ +85 c storage temperature t stg -40 ~ +125 c notes: 1. absolute maximum ratings are those values beyond which the device could be permanently damaged. absolute maximum ratings are stress ratings only and functional device oper ation is not implied. 2. not to exceed p d . ? recommended operating conditions parameter symbol min typ max units supply voltage ub2012a v cc 4.5 7.0 v ub2012b ub2012c v cc 8.6 12 v ub2012d operating free-air temperature range t a -20 85 c ? electrical characteristics parameter symbol conditions min typ max units v cc current i (vcc) v cc > v cc(min) , excluding external loads ub2012a 2 5 ma ub2012b ub2012c 3 7 ma ub2012d v cc sleep current i (vccs) v (bat) v (min) v (bat) - v cc 0.8v ub2012a 3 6 a ub2012b ub2012c 15 a ub2012d input bias current bat pin i ib ( bat ) v ( bat ) =v ( reg ) 3 a sns pin i ib ( sns ) v ( sns ) =5v 5 a ts pin i ib ( ts ) v ( ts ) =5v 5 a comp pin i ib ( comp ) v ( comp ) =5v 5 a battery voltage regulation output voltage v o(reg) see notes ub2012a 4.050 4.10 4.150 v ub2012b 4.150 4.20 4.250 v ub2012c 8.100 8.20 8.300 v ub2012d 8.300 8.40 8.500 v current regulation current regulation threshold v (sns) current sensing configuration ub2012a 80 100 120 mv ub2012b ub2012c 90 115 140 mv ub2012d charge termination detection charge termination current detect threshold v (term) voltage at pin sns, 0c t a 50c -24 -14 -4 mv
ub2012 preliminary linear integrated circuit unisonic technologies co., ltd 5 of 17 www.unisonic.com.tw qw-r121-018 .c ? electrical characteristics temperature comparator temperature threshold lower v ( ts1 ) ts pin voltage 29.1 30 30.9 %v cc upper v ( ts2 ) 58.2 60 61.8 %v cc precharge comparator precharge threshold v (min) ub2012a 2.94 3.0 3.06 v ub2012b 3.04 3.1 3.16 v ub2012c 5.88 6.0 6.12 v ub2012d 6.08 6.2 6.32 v precharge current regulation precharge current regulation v (prechg) voltage at pin sns, 0c t a 50c 13 mv voltage at pin sns, 0c t a 50c, v cc = 5 v 3 13 22 mv v rch comparator (battery recharge threshold) recharge threshold v (rch) ub2012a v o(reg) -70mv v o(reg - -100mv v o(reg) -130mv v ub2012b ub2012c v o(reg) -140mv v o(reg) -200mv v o(reg) -260mv v ub2012d charge-rate compensation (autom atic charge-rate compensation) automatic charge-rate compensation gain g (comp) v (bat) +0.3v v cc v cc(max), 1.7 2.2 2.7 v/v stat pin output (low) voltage v ol ( stat ) i ol =10ma 0.7 v output (high) voltage v oh ( stat ) i oh =5ma v cc -0.5 v cc pin output low voltage v ol ( cc ) i o ( cc ) =5ma (sink) 1.6 v sink current i o ( cc ) not to exceed power rating (p d ) 5 40 ma note: v ( bat ) +0.3 v v cc v cc ( max )
ub2012 preliminary linear integrated circuit unisonic technologies co., ltd 6 of 17 www.unisonic.com.tw qw-r121-018 .c ? typical application circuit ub2012 gnd c2 10 f v ss v cc sns cc bat stat ts comp r1 1k r sns 0.2 dc+ q1 2sb1151 v cc c1 10 f v cc r t1 temp pack- pack+ r t2 r2 2k d2 battery pack ntc fig. 1 0.5a low dropout li-lon/li-pol charger d1 functional description the utc ub2012 is designed for the applications of single or tw o-cell li-ion or li-pol batteries. fig. 1 is the schematic of using this advanced linear charge controller with a pnp pass transisto r. fig. 2 is the operation flowchart of utc ub2012 . fig. 3 shows the typical charge profile. fig. 4 is the application schematic of a charger using p-channel mosfet.
ub2012 preliminary linear integrated circuit unisonic technologies co., ltd 7 of 17 www.unisonic.com.tw qw-r121-018 .c ? application information fig. 2 operation flowchart por v cc >v (bat) checked at all times yes ts pin in ts1 to ts2 range yes v (bat) ub2012 preliminary linear integrated circuit unisonic technologies co., ltd 8 of 17 www.unisonic.com.tw qw-r121-018 .c ? application information(cont.) fig. 3 typical charge profile preconditionin g phase current regulation phase voltage regulation and charge termination phase regulation current regulation voltage minimum charge voltage preconditioning and taper detect qualification and precharge when the battery is present and power is applied, the utc ub2012 starts a charge-cycl e. charge qualification is affected by battery temperature and voltage. if the battery temperature is out of the v ts1 to v ts2 range; the utc ub2012 will suspend charge. in addition, if the batte ry voltage is below the precharge threshold v (min) , the utc ub2012 uses precharge to condition the battery. the conditioning charge rate i (prechg) is set at approximately 10% of the regulation current, and the condit ioning current minimizes heat dissipati on in the external pass-element during the beginning of charge, refer to fig. 3.
ub2012 preliminary linear integrated circuit unisonic technologies co., ltd 9 of 17 www.unisonic.com.tw qw-r121-018 .c ? application information(cont.) fig. 4 0.5-a charger using p-channel mosfet dc+ c1 10 f r sns 0.2 r 2 1k utc ub2012 cc sns vcc vss stat ts bat comp r 4 511 r 5 1k r 3 1k r t2 temp pack- c2 10 f pack+ ntc battery pack cmd67- 22sru q1 ut4101 d1 v cc v cc r t1 gnd current regulation phase when the battery-pack voltage is le ss than the regulation voltage, v o(reg) , the current is regulated by the utc ub2012 . this advanced linear charge management ic monitors charge current at the sns input by the voltage drop across a sense-resistor, r sns , in series with the battery pack. in current sensing configuration (fig. 5), r sns is between the vcc and sns pins. charge-current feedback, applied through pin sns, maintains a voltage of v sns across the current sense resistor. the following formu la calculates the value of the sense resistor: o(reg) (sns) sns i v r = (1) where i o(reg) is the desired charging current.
ub2012 preliminary linear integrated circuit unisonic technologies co., ltd 10 of 17 www.unisonic.com.tw qw-r121-018 .c ? application information(cont.) voltage regulation phase the voltage regulation feedback is through the bat pin. this input is tied directly to the positive side of the battery pack. the utc ub2012 monitors the battery-pack voltage between the bat and vss pins. according to the voltage regulation, there ar e four versions of utc ub2012 , namely, 4.1v, 4.2v, 8.2v and 8.4v. other regulation voltages can be ac hieved by adding a voltage divide r between the positive and negative terminals of the battery pack and using utc ub2012 c or utc ub2012 d. the voltage divider presents scaled battery-pack voltage to bat input. (see fig. 7, 8) the re sistor values rb1 and rb2 for the voltage divider are calculated by the following equation: 1 - ) v v (n = r r o(reg) (cell) b2 b1 (2) where: n = number of cells in series, v (cell) = desired regulation voltage per cell charge termination and recharge the utc ub2012 monitors the charging current durin g the voltage-regulation phase. the utc ub2012 declares a done condition and terminates charge when the current tapers off to the charge termination threshold, i (term) . a new charge cycle begins when the battery voltage falls below the v (rch) threshold.
ub2012 preliminary linear integrated circuit unisonic technologies co., ltd 11 of 17 www.unisonic.com.tw qw-r121-018 .c ? application information(cont.) battery temperature monitoring the utc ub2012 continuously monitors temperature by meas uring the voltage between the ts and vss pins. a negative- or a positive-temperature co efficient thermistor (ntc, ptc) and an external voltage divider typically develop this voltage. (see fig. 9) the utc ub2012 compares this voltage against its internal v (ts1) and v (ts2) thresholds to determine if charging is allowed. (see fi g. 10) the temperature sensing circuit is immune to any fluctuation in v cc , since both the external voltage divider and the internal thresholds (v (ts1) and v (ts2) ) are referenced to v cc . the resistor values of r (t1) and r (t2) are calculated by the following equations: for ntc thermistors: ) r r ( 3 r r 5 = r th tc tc th 1 t - (3) )] r 7 ( - ) r 2 [( r r 5 = r th tc tc th 2 t (4) for ptc thermistors: ) r r ( 3 r r 5 = r tc th tc th 1 t - (5) )] r 7 ( - ) r 2 [( r r 5 = r tc th tc th 2 t (6) where r (tc) is the cold temperature resistance and r (th) is the hot temperature re sistance of thermistor, as specified by the thermistor manufacturer. r t1 or r t2 can be omitted if only one temperat ure (hot or cold) setting is requi red. applying a voltage between the v (ts1) and v (ts2) thresholds to pin ts disables the temperature-sensing feature. utc ub2012 sns bat v cc ts stat v ss cc comp bat- bat+ r sns dc+ dc- r t1 r t2 thermistor fig. 7 temperature sensing circuits fig. 8 utc ub2012 ts input thresholds
ub2012 preliminary linear integrated circuit unisonic technologies co., ltd 12 of 17 www.unisonic.com.tw qw-r121-018 .c ? application information(cont.) charge inhibit function the ts pin can be used as charge-inhibit input. the user can inhibit charge by connecting the ts pin to vcc or vss (or any level outside the v (ts1) to v (ts2) thresholds). applying a voltage between the v (ts1) and v (ts2) thresholds to pin ts returns the charger to normal operation. charge status indication the utc ub2012 reports the status of the char ger on the 3-state stat pin. t he following table summarized the operation of the stat pin. condition stat pin battery conditioning and charging high charge complete (done) low temperature fault or sleep mode hi-z the stat pin can be used to drive a single led (figure 1), dual-chip leds (fig. 4) or for interface to a host or system processor (fig. 11). when interfacing the utc ub2012 to a processor, the user can use an output port, as shown in figure 11, to recognize the high- z state of the stat pin. in this conf iguration, the user needs to read the input pin, toggle the out put port and read the stat pin again. in a hi gh-z condition, the input port always matches the signal level on the output port. utc ub2012 sns bat v cc ts stat v ss cc comp out in host processor figure 9 interfacing the utc ub2012 to a host processor low-power sleep mode the utc ub2012 enters the sleep mode if the v cc falls below the voltage at the bat input. this feature prevents draining the battery pack during the absence of v cc .
ub2012 preliminary linear integrated circuit unisonic technologies co., ltd 13 of 17 www.unisonic.com.tw qw-r121-018 .c ? application information(cont.) selecting an external pass-transistor the utc ub2012 is designed to work with both pnp transist or and p-channel mosfet. the device should be chosen to handle the required power dissipation, give n the circuit parameters, pcb layout and heat sink configuration. the following examples illust rate the design process for either device: pnp transistor: selection steps for a pnp bipolar transistor: example: v i = 4.5v, i (reg) = 1a, 4.2-v single-cell li-ion (utc ub2012c ). v i is the input voltage to the charger and i (reg) is the desired charge current (see fig. 1). 1. determine the maximum power dissipation, p d , in the transistor. the worst case power dissipation happens when the cell voltage, v (bat) , is at its lowest (typically 3v at the beginning of current regulation phase) and v i is at its maximum. where v cs is the voltage drop across the current sense resistor. p d = (v i -v (cs) -v (bat) )i (reg) (7) p d = (4.5-0.1-3)1a p d = 1.4w 2. determine the package size needed in order to ke ep the junction temperature below the manufacturer?s recommended value, t jmax . calculate the total theta, (c/w), needed. ja = d a(max) max(j) p ) t - (t (8) ja = 4 . 1 ) 40 - 150 ( ja = 78c/w now choose a device package with a theta at least 10% be low this value to account for additional thetas other than the device. a sot-223 package, for inst ance, has typically a theta of 60c/w. 3. select a collector-emitter voltage, v (ce) , rating greater than the maximum input voltage. a 15-v device will be adequate in this example. 4. select a device that has at least 50% higher drain current i c rating than the desired charge current i (reg) . 5. using the following equation calculate the minimum beta ( or h fe ) needed: min =i cmax / i b (9) min =1 / 0.035 min =28 where i max(c)) is the maximum collector current (in this case same as i (reg) ), and i b is the base current (chosen to be 35 ma in this example). now choose a pnp transistor that is rated for v (ce) 15 v, ja 78c /w, i c 1.5 a, min 28 and that is in a sot-223 package.
ub2012 preliminary linear integrated circuit unisonic technologies co., ltd 14 of 17 www.unisonic.com.tw qw-r121-018 .c ? application information(cont.) selecting an external pass-transistor (cont.) p-channel mosfet: selection steps for a p-channel mosfet: example: v i = 5.5 v, i (reg) = 500ma, 4.2-v single-cell li-ion (utc ub2012 c). v i is the input voltage to the charger and i (reg) is the desired charge current (see figure 4). 1. determine the maximum power dissipation, p d , in the transistor. the worst case power dissipation happens when the cell voltage, v (bat) , is at its lowest (typically 3 v at the beginning of current regulation phase) and v i is at its maximum. where v d is the forward voltage drop across the re verse-blocking diode (if one is used), and v cs is the voltage drop across the current sense resistor. p d = (v i -v d -v (cs) -v (bat) )i (reg) (10) p d = (5.5-0.4-0.1-3)0.5a p d = 1w 2. determine the package size needed in order to ke ep the junction temperature below the manufacturer?s recommended value, t jmax . calculate the total theta, (c/w), needed. ja = d a(max) max(j) p ) t - (t (11) ja = 1 ) 40 - 150 ( ja = 110c/w now choose a device package with a theta at least 10% below this value to account for additional thetas other than the device. a sop-8 package, for inst ance, has typically a theta of 70c/w. 3. select a drain-source voltage, v (ds) , rating greater than the maximum i nput voltage. a 12v device will be adequate in this example. 4. select a device that has at least 50% higher drain current (i d ) rating than the desired charge current i (reg) . 5. verify that the available drive is large enough to supply the desired charge current. v (gs) = (v d +v (cs) +v ol(cc) )-v i (12) v (gs) = ( 0.4+0.1+1.5)-5.5 v (gs) = -3.5 where v (gs) is the gate-to-source voltage, v d is the forward voltage drop across the reverse-blocking diode (if one is used), and v cs is the voltage drop across the current sense resistor, and v ol(cc) is the cc pin output low voltage specification for the utc ub2012 . select a mosfet with ga te threshold voltage, v (gsth) , rating less than the calculated v (gs) . now choose a p-channel mosfet tr ansistor that is rated for v ds -15v, ja 110c /w, i d 1a, v (gsth) -3.5v and in a sop package.
ub2012 preliminary linear integrated circuit unisonic technologies co., ltd 15 of 17 www.unisonic.com.tw qw-r121-018 .c ? application information(cont.) selecting input capacitor in most applications, a high-frequency de coupling capacitor is required. a 0.1 f ceramic, placed in proximity to vcc and vss pins, works well. the utc ub2012 works with both regulated and unregulated external dc supplies. if a non-regulated supply is chosen, the supply unit should ha ve enough capacitance to hold up the supply voltage to the minimum required input voltage at maximum load, otherwise more capacitance must be added to the input of the charger. selecting output capacitor for loop stability, the utc ub2012 does not require any output capacitor. however, when a battery is not present, the user can add out put capacitance in order to control the out put voltage. the charger quickly charges the output capacitor to the regulation volt age, but the output voltage decays slowly , because of the low leakage current on the bat pin, down to the recharge threshold. addition of a 0.1 f ceramic capacitor, for instance, results in a 100 mv (pp) ripple waveform, with an appr oximate frequency of 25hz. higher capacit or values can be used if a lower frequency is desired. automatic charge-rate compensation in order to compensate safely for internal impedance of the battery pack, the utc ub2012 uses the automatic charge-rate compensation technique to reduce charging time. the automatic charge-r ate compensation feature is disabled by connecting the comp pin to v cc in current-sensing configuration. fig. 12 outlines the main components of a single-cell li -ion battery pack. the li-ion battery pack consists of a cell, protection circuit, fuse, current sense-resistors, connector, and some wiring. there are some resistances in each of these components. total impedanc e of the battery pack is equal to t he sum of the minimum resistances of all battery-pack components. using the minimum resist ance values reduces the odds for overcompensating. overcompensating may activate the sa fety circuit of the battery pack. bat+ terminal fuse bat- wire terminal discharge charge wire wire cell wire protection controller fig. 10 typical components of a single-cell li-lon pack compensation is achieved through input pin comp (fig. 13). a portion of the current -sense voltage, presented through this pin, is scaled by a factor of g (comp) and summed with the regulation threshold, v o(reg) . this process increases the output voltage to com pensate for the battery pack?s internal impedance and for undesired voltage drops in the circuit.
ub2012 preliminary linear integrated circuit unisonic technologies co., ltd 16 of 17 www.unisonic.com.tw qw-r121-018 .c ? application information(cont.) automatic charge-rate comp ensation setup requires the following information: * total impedance of battery pack (z (pack) ) * maximum charging current (i (reg) ) the voltage drop across the internal impedance of battery pack, v (z) , can then be calculated using the following equation: ) reg ( ) pack ( ) z ( i z = v (13) the required compensation is then calc ulated using the following equations: ) comp ( ) z ( ) comp ( g v = v (14) ) v g ( + v = v ) comp ( ) comp ( ) reg ( o ) pack ( where v (comp) is the voltage on comp pin. this voltage is referenced to vcc in current sensing configuration. v (pack) is the voltage across the battery pack. the values of r (comp1) and r (comp2) can be calculated using the following equation: 2 comp 1 comp 2 comp ) sns ( ) comp ( r + r r = v v (15) utc ub2012 sns bat v cc ts stat v ss cc comp dc+ dc- r sns r comp2 r comp1 bat+ fig. 11 automatic charge-rate compensation circuits
ub2012 preliminary linear integrated circuit unisonic technologies co., ltd 17 of 17 www.unisonic.com.tw qw-r121-018 .c ? application information(cont.) the following example illustrates these calculations: assume z (pack) = 100 m ? , i (reg) = 500 ma, current sensing utc ub2012b ) reg ( ) pack ( ) z ( i z = v (16) v (z) =0.10.5 v (z) =50mv ) comp ( ) z ( ) comp ( g v = v (17) v (comp) =0.05/2.2 v (comp) =22.7mv let r comp2 = 10 k ? ) comp ( ) comp ( ) sns ( 2 comp 1 comp v ) v v ( r = r - (18) mv 7 . 22 ) mv 7 . 22 - mv 105 ( k 10 = r 1 comp 36.25k ? r comp1 = use the closest standard value (36.0 k ? ) for r comp1 utc assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all utc products described or contained herein. utc products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice.

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